The present invention relates to a semiconductor device and, more specifically, to a so-called state machine in which a mathematical model is expressed as a circuit on an LSI as well as a semiconductor device using the state machine and a method of design of thereof.
The recent rapid progress in electronics technologies has brought about remarkable development in fields such as networks and computers. A large variety of application technologies which had never been imagined in the past have been developed and, as a result thereof, numerous new products have come about.
Since the invention of the transistor in 1947, an IC (integrated circuit) used in every field of electronics has made great progress during this half of the century.
IC technology has developed since the invention of the IC by Kilby of Texas Instruments Incorporated in the U.S. and after the times of the standard logic IC, has shifted to the LSI (large scale IC), and further to the ASIC (application specific IC) represented by a gate array and a standard cell.
Due to the complicated and advanced functions required for recent integrated circuits, time needed for development of the circuits tends to be prolonged. In a gate array and a standard cell, however, basic cells which are prepared and registered by an IC manufacturer in advance are arrayed according to predetermined rules, and a unique logic circuit can be formed simply by changing a wiring step, thereby shortening time for logic design.
On the other hand, two kinds of so-called state machines have been developed which express mathematical models on LSIs:
(1) A state machine which basically consists of a counter, and
(2) A state machine which basically consists of random logic.
The conventional state machine basically consisting of a counter has the following characteristics:
(a) The regular state transition makes the circuit simple, which leads to easier design and inspection.
(b) The regular state transition enables an operator to readily take measures in case of damage (working failure) and makes the machine highly reliable.
(c) The regular state transition leads to a simple circuit, which makes a critical path shorter, resulting in high speed performance.
(d) The state transition depends on the kinds of counters used such as binary, gray code, Johnson and one hot, which leads to lower flexibility.
The conventional state machine basically consisting of random logic has the following characteristics:
(a) The irregular state transition makes the circuit complicated, which leads to difficulties with design and inspection.
(b) The irregular state transition disables an operator to readily take measures in case of damage (working failure) and makes the machine unreliable.
(c) The irregular state transition leads to a complicated circuit, which makes a critical path longer, resulting in low speed performance.
(d) A designer can freely establish the state transition of the state machine, which leads to high flexibility.
On the other hand, the conventional designing method for semiconductor devices comprises the two steps: a function designing step and a logic designing step. The function designing step includes function design, function division, and making of operation models. The function division means to divide the whole system into some units (circuits). When dividing, the system should be divided into appropriate units (circuits) taking into account the performance and specifications required.
In the conventional designing method, however, the function division, which has no particular method, depends on each designer""s techniques and experience, and results of division very from designers to designers. Therefore, there is no unity in dividing a system, thereby lowering the readability of the whole system after division and also making the performance thereof inconsistent.
The first object of the present invention is to provide a state machine which solves each of the problems of the above-described conventional state machines, has higher flexibility compared to the state machines basically consisting of counters, and also has a simpler structure and higher reliability compared to the state machines basically consisting of random logic, as well as to provide a semiconductor device using the state machine.
The second object of the present invention is to provide a method of design of a semiconductor device which uses the above state machine, is capable of providing the division of the system with unity and, consequently, enables the whole system after division to have higher readability with more consistency in performance.
In order to attain the above first object, the state machine of the present invention is a state machine comprising a memory circuit for holding a present state and a circuit for generating a next state, wherein the circuit for generating the next state has at least two circuits selected from an analyzer circuit, an arithmetic circuit and a comparator circuit, said circuits being connected to each other maintaining independency of each circuit.
In principle, the connection maintaining independency is made between the inputs and outputs of the circuits of which signals have the same property.
The memory circuit, comparator circuit, analyzer circuit and arithmetic circuit can be connected using a software means or hardware means in optional combination and order.
The most remarkable feature of the present invention is that a state machine is constructed by connecting the circuits while maintaining independency of each of the circuits. By this structure, the present invention has solved the problem lying in the conventional state machines, that is, the more complicated the state transition is, the more complicated the structure and operation of the circuit for generating the next state are, which leads to difficulties in designing. Namely, any state machine which performs any state transition can be realized with the simple structure of circuits and operation. Thus, such advantages as shorter time for designing, higher reliability of the circuit and reuse of designing assets can be obtained.
In this description, the connection while maintaining independency of the circuits means the state where each circuit has its own distinct role (or function division) independently. As a particular method of connection, it can be realized by connecting the above circuits so that the signals of the circuits have the same property.
In order to attain the above second object, the function design and logic design of a semiconductor device are performed incorporating the above-described state machine.
The present invention exhibits the following effects:
(1) The analyzer circuit, the arithmetic circuit and the comparator circuit which constitute the state machine are connected so that only the signals having the same property are connected while maintaining independency of each of the circuits. Thus, the present invention realized any state machine which can perform any state transition by simple structure and operation of the circuit, and has solved the following conventional problems: the more complicated the state transition is, the more complicated the structure and operation of the circuit for generating the next state are, which leads to difficult designing; and the state machine with a simple structure has difficulties in realizing a flexible state transition. Accordingly, the present invention can provide a state machine which has higher flexibility compared to the state machine basically consisting of a counter and also is highly reliable with a simpler structure compared to the state machine basically consisting of a random logic.
(2) Each analyzer circuit, the arithmetic circuit and the comparator circuit is structured to have a single function respectively. Therefore, defective designing, erroneous connection, and change in property of the signal of each circuit can be prevented.
(3) A semiconductor device in which the state machine of the present invention is incorporated has a simple and clear structure, which can realize a high-speed circuit and higher reliability.
(4) According to the method of design for incorporating the state machine of the present invention to a semiconductor device, the performance of the system can be precisely estimated at an early stage of designing the semiconductor device, thereby preventing repetition of design and shortening time for design.